d flipflop
D-flipflop. Shifts the logic state on its data input into its storage on each rising edge of the clock input.
Inlets
bool32 data
bool32 reset
bool32.rising clock input
Outlets
bool32 output
Declaration
int last_clock;
int data;
Init
last_clock = 0;
data = 0;
Control Rate
if ((inlet_clock > 0) && (last_clock <= 0)) {
data = (inlet_data > 0) ? (1 << 27) : 0;
}
if (inlet_reset > 0)
data = 0;
last_clock = inlet_clock;
outlet_o = data;