0 filteri

0 is filterd out
Author: philoop
License: BSD
Github: phi/logic/0 filteri.axo

Inlets

int32 input

Outlets

int32 output

Declaration
int ntrig;
int latch;
Control Rate
if ((inlet_i != 0) && !ntrig) {
  latch = inlet_i;
  ntrig = 1;
} else
  ntrig = 0;
outlet_o = latch;

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