counter i

cyclic up counter
Author: Johannes Taelman
License: BSD
Github: phi/logic/counter i.axo

Inlets

bool32.rising trigger

bool32.rising reset

int32 count

Outlets

int32 output

bool32.pulse carry pulse

Declaration
int ntrig;
int rtrig;
int count;
Init
count = 0;
ntrig = 0;
rtrig = 0;
Control Rate
outlet_c = 0;
if ((inlet_trig > 0) && !ntrig) {
  count += 1;
  if (count >= inlet_count) {
    count = 0;
    outlet_c = 1;
  }
  ntrig = 1;
} else if (!(inlet_trig > 0))
  ntrig = 0;
if ((inlet_r > 0) && !rtrig) {
  count = 0;
  rtrig = 1;
} else if (!(inlet_r > 0))
  rtrig = 0;
outlet_o = count;

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