signalSync
auto-sync modulator connect the sync-signal (any audio signal going from negative to positive) to the sync-input. Any signal at the in-input will put into the buffer and it is reminded at which point in the buffer the in-input went from negative to positive. Whenever the sync input goes positive, the buffer will be read out from the last zero-crossing within the buffer, auto syncing that signal to the sync signal. Useful for AM-synthesis with signals/oscillators that don't have a hard-sync.
Inlets
frac32buffer wave input
frac32buffer sync
Outlets
frac32buffer out
Attributes
combo size
Declaration
static const uint32_t LENGTHPOW = (attr_size);
static const uint32_t LENGTH = (1 << attr_size);
static const uint32_t LENGTHMASK = ((1 << attr_size) - 1);
int16_t *array;
uint32_t writepos;
uint32_t cnt;
uint32_t Time;
bool trg;
uint32_t pos;
bool Trg;
uint32_t set;
uint32_t env;
uint32_t form;
int32_t left;
Init
static int16_t _array[attr_poly][1 << attr_size]
__attribute__((section(".sdram")));
array = &_array[parent->polyIndex][0];
int i;
writepos = 0;
for (i = 0; i < LENGTH; i++)
array[i] = 0;
Audio Rate
writepos = (writepos + 1) & LENGTHMASK;
array[writepos] = __SSAT(inlet_in >> 14, 16);
cnt += 1;
if ((inlet_in > 0) && !trg) {
trg = 1;
cnt = 0;
} else if (inlet_in <= 0) {
trg = 0;
}
env -= env >> 2;
left -= left >> 3;
if ((inlet_sync > 0) && !Trg) {
left += ___SMMUL(env, array[(writepos - form) & LENGTHMASK] << 16);
Trg = 1;
form = set;
set = cnt;
env = (1 << 30);
} else if (inlet_sync <= 0) {
Trg = 0;
}
outlet_out =
___SMMUL((1 << 30) - env, array[(writepos - set) & LENGTHMASK] << 16);
outlet_out += ___SMMUL(env, array[(writepos - form) & LENGTHMASK] << 16) + left;