Akso - Audio DSP Platform

pcf

$\text{[math]}$

Panning phaser/chorus/flanger

Author: Remco van der Most

License: BSD

Github: sss/fx/pcf.axo

Inlets

frac32buffer wave input

frac32 rate

frac32 spread

frac32 depth

frac32 phase

Outlets

frac32buffer outL

frac32buffer outR

Parameters

frac32.s.map sets modulation rate

frac32.s.map spreads the seperate stages over the spectrum

frac32.s.map sets modulation depth on top of spreading

frac32.s.map phase offset between modulations

frac32.s.map modulation width

frac32.s.map panning amount

frac32.s.map feedback amount

frac32.s.map wet level

int32 modulation mode, connects different LFO's to modulate each other for different phasing/panning fx

Attributes

spinner stages

combo size

Declaration

static const uint32_t LENGTHPOW = (attr_size);
static const uint32_t LENGTH = (1 << attr_size);
static const uint32_t LENGTHMASK = ((1 << attr_size) - 1);
int16_t *array;
uint32_t writepos;
uint32_t phase[attr_stages];
int i;
int32_t sine[attr_stages];
int32_t v29 = (1 << 29);
int32_t v30 = (1 << 30);
int32_t SUM;
int32_t prv;
int32_t stp;
int32_t Prv;
int32_t Stp;

Init

static int16_t _array[1 << attr_size] __attribute__((section(".sdram")));
array = &_array[0];

for (i = 0; i < attr_stages; i++) {
  phase[i] = 0;
}

writepos = 0;
for (i = 0; i < LENGTH; i++)
  array[i] = 0;

Control Rate

int32_t depth = __SSAT(param_depth + inlet_depth, 28);
depth = ___SMMUL(depth << 2, ___SMMUL(depth << 3, depth << 2) << 2);
int32_t freq;
MTOFEXTENDED(param_rate + inlet_rate, freq)
freq = freq >> 12;
int32_t spread = ___SMMUL(param_spread + inlet_spread << 3, freq << 3) >> 3;
int32_t Phase = inlet_phase + param_phase << 4;

stp = (Phase - prv) >> 4;
int32_t PHS = prv;
prv = Phase;
Stp = (spread - Prv) >> 4;
int32_t SPR = Prv;
Prv = spread;

Audio Rate

writepos = (writepos + 1) & LENGTHMASK;
array[writepos] =
    __SSAT(inlet_in + ___SMMUL(param_feed << 2, SUM << 1) >> 14, 16);
int32_t IN = inlet_in;
SUM = 0;
outlet_outL = inlet_in >> 1;
outlet_outR = inlet_in >> 1;
int32_t sumL = 0;
int32_t sumR = 0;
PHS += stp;
SPR += Stp;
for (i = 0; i < attr_stages; i++) {

  int k = i + param_mod;
  k = k - k / attr_stages * attr_stages;
  phase[i] += freq + (i >> 1) * SPR;
  uint32_t MOD = phase[i] + (i * PHS) + ___SMMUL(sine[k] << 1, param_MW << 1);
  SINE2TINTERP(MOD, sine[i])
  sine[i] = (sine[i] >> 2) + v29;

  uint32_t tmp_d = ___SMMUL(sine[i], depth);
  uint32_t tmp_di = writepos - (tmp_d >> (27 - LENGTHPOW)) - 1;
  uint32_t tmp_w1 = (tmp_d << (LENGTHPOW + 3)) & 0x3FFFFFFF;
  uint32_t tmp_w2 = v30 - tmp_w1;
  int32_t tmp_a1 = array[tmp_di & LENGTHMASK] << 16;
  int32_t tmp_a2 = array[(tmp_di + 1) & LENGTHMASK] << 16;
  int32_t tmp_r = ___SMMUL(tmp_a1, tmp_w1);
  tmp_r = ___SMMLA(tmp_a2, tmp_w2, tmp_r);

  int32_t pan;
  SINE2TINTERP(MOD, pan)
  pan = ___SMMUL(pan, param_pan << 2);

  sumL += ___SMMUL(tmp_r << 2, v29 + pan);
  sumR += ___SMMUL(tmp_r << 2, v29 - pan);
  SUM += tmp_r / attr_stages;
}
outlet_outL = (___SMMUL(sumL << 3, param_wet << 3) + (IN));
outlet_outR = (___SMMUL(sumR << 3, param_wet << 3) + (IN));