rCount

cyclic up counter that is initiated at position -1 and reset to position -1. Had to make this one for the sample-table creator, otherwise the first sample was always skipped for the record.
Author: Johannes Taelman editted by Remco van der Most
License: BSD
Github: sss/logic/rCount.axo

Inlets

bool32.rising trigger

bool32.rising reset

int32 MaxSampleAmount

Outlets

bool32.pulse carry pulse

int32 output

Declaration
int ntrig;
int rtrig;
int count;
Init
count = -1;
ntrig = 0;
rtrig = 0;
Control Rate
outlet_c = 0;
if ((inlet_trig > 0) && !ntrig) {
  count += 1;
  if (count >= inlet_MaxSampleAmount) {
    count = 0;
    outlet_c = 1;
  }
  ntrig = 1;
} else if (!(inlet_trig > 0))
  ntrig = 0;
if ((inlet_r > 0) && !rtrig) {
  count = -1;
  rtrig = 1;
} else if (!(inlet_r > 0))
  rtrig = 0;
outlet_o = count;

Privacy

© 2024 Zrna Research